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74LVC2G240 Datasheet, NXP Semiconductors

74LVC2G240 Datasheet, NXP Semiconductors

74LVC2G240

datasheet Download (Size : 127.32KB)

74LVC2G240 Datasheet
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74LVC2G240 driver equivalent, dual inverting buffer/line driver.

74LVC2G240

datasheet Download (Size : 127.32KB)

74LVC2G240 Datasheet
1.0 · rating-1

Features and benefits

I I I I Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: N JESD8-.

Application

using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is .

Description

The 74LVC2G240 is a dual inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pins nOE causes the outputs to assume a high-impedance OFF-state. Schmitt trigger .

Image gallery

74LVC2G240 Page 1 74LVC2G240 Page 2 74LVC2G240 Page 3

TAGS

74LVC2G240
Dual
inverting
buffer
line
driver
NXP Semiconductors

Manufacturer


NXP (https://www.nxp.com/) Semiconductors

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